| 参考文献 |
| 1.
A. Rosenbluth et al.,“Optimum Mask and Source Patterns to Print a Given Shape,” Proc. SPIE, 2001, Vol. 4346, p. 486; see also D. Flagello et al.,“Optical Lithography in the Sub-50 nm Regime,”Proc. SPIE, 2004, Vol. 5377, p. 21. |
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| 2.
J.F. Chen and J.A. Matthews,“Mask for Photolithography,”Patent 5,242,770. |
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| 3.
S. Hsu et al.,“65 nm Full-Chip Implementation Using Double Dipole Lithography,” Proc. SPIE, 2003, Vol. 5040, p. 215. |
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| 4.
Journal of Microlithography, Microfabrication, and Microsystems (JM3), Immersion Lithography special issue, January 2004, several excellent papers reviewing the emergence of this field. |
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| 5.
C. Wagner et al.,“Stepping and Scanning Into the NA>1 Immersion Exposure Era,” SEMICON Japan, December 2005. |
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| 6.
D. Gil et al.,“First Microprocessors With Immersion Lithography,”Proc. SPIE, 2005, Vol. 5754, p. 119. |
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| 7.
J.H. Chen et al.,“Characterization of ArF Immersion Process for Production,”Proc. SPIE, 2005, Vol. 5754, p. 13. |
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| 8.
J. Mulkens, Sematech Immersion Workshop, Brugges, Belgium, September 2005. |
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| 9.
M. Maenhoudt, J. Versluijs, H. Struyf, J. Van Olmen and M. Van Hove,“Double Patterning Scheme for Sub-0.25 k1 Sinzgle Damascene Structures at NA=0.75,λ=193nm,”Proc. SPIE, 2005, Vol. 5754, p.1508. |